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 ESMT

Synchronous Graphic RAM
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT

















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DQM3 VDDQ DQ15 DQ25 DQ28 DQ27 DQ26 DQ24 DQ14 DQM1 DQ11 DQ13 DQ12 DQ10 VDDQ VSSQ VDDQ VDDQ VSSQ VSSQ DQ 9 DQ 8 CKE CLK DSF 53 VDD N. C VSS A8/AP 51 N. C 52
80
79
78
77
76
75
74
71
73
72
70
69
68
67
66
65
64
63
62
61
60
59 58
57
56











10 11 12 13 14 15 16 17 18 19 20 21 23 24 27 28 22 25 26 29 30 1 2 3 4 5 6 7 8 9 ! " " " " # $ %
55
54
50 49 48 47 46 45 44 43 42 41 40 39 38










VDDQ
VSSQ
DQ 6
DQ 7
WE
CS BA(A11)
DQ 3 VDDQ
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DQ 4
DQ 5
DQ16
DQ17
DQ18
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DQ19 VDDQ
DQM0
DQM2
DQ20
DQ23
CAS
DQ22
VDDQ
RAS
VDD
Elite Semiconductor Memory Technology Inc.
P.
VSS
Publication Date : Oct. 2001 Revision : 1.5
A9
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
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Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Publication Date : Oct. 2001 Revision : 1.5
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Elite Semiconductor Memory Technology Inc.
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Publication Date : Oct. 2001 Revision : 1.5
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Elite Semiconductor Memory Technology Inc.
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Publication Date : Oct. 2001 Revision : 1.5
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Elite Semiconductor Memory Technology Inc.
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Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT


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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT

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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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1) Clock Suspe nde d Dur ing Write (BL=4) 2) Clock Suspen de d Dur in g Read (BL=4)
CLK CMD CKE Internal CLK DQ(CL2) DQ(CL3) D0 D0 D1 D1 D2 D2 Not Written D3 D3 Q0 Q1 Q2 Q1 Q3 Q2 Q3 WR RD
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
( 5$9
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
"#2'2*
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CLK CMD ADD DQ(CL2) DQ(CL3)
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CLK CMD WR WR
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Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
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DQ iv)CMD DQM RD
Hi-Z
D0
D1 WR
D2
D3
DQ
Q0
Hi-Z
*Note1
D0
D1
D2
D3
<=C.6C
CLK i)CMD DQ M DQ D0 D2 D3 RD WR
D1 WR
ii)CMD DQ M DQ iii)CMD DQM
RD
D0
D1
D2
D3
RD
WR
DQ iv)C MD DQ M RD
D0
D1 WR
D2
D3
DQ v) C M D DQM RD
Hi-Z
D0
D1 WR
D2
D3
DQ
Q0
Hi- Z
*Note 2
D0
D1
D2
D3
FB5 A%,#+) ".$,$)'+((&(%+2'(("(''(() A%,#+) ".*$)'+")'2$" $(!((&(%+2'(("(''(()
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
: 42
%/5$
CLK CMD
*Note 2
WR
PRE
*Note 1
DQ M DQ D0 D1 D2 D3
Masked by DQM
FB5 A"$"+""#("'2,".*$)'+")' A$"%, $(,& ('('+),2," ('$)'+0$(+(!.$,2"""%, $(,&",,)% +)($,+(!%, $(,&0')(+(!%,("
K %
=B,(8,"<6C=
CLK CMD DQ WR D0 D1 D2 D3 PRE CLK CMD BW Pi xel PRE
=6 !8,"
DQ
tRDL
*Note 1
tBPL
*Note 1
=4('<6C=
CLK CMD RD Q0 Q1 Q0 PRE
*Note 2
DQ( CL2) DQ( CL3)
Q2 Q1
Q3
1
Q2
Q3
2
F " %
=B,(8,"<6C=
CLK CMD DQ WR D0 D1 D2 D3
*Note3
=6 !8,"
CLK CMD DQ BW Pi xel
tB PL
Auto Precharge starts
tRP tBAL
*Note3
Auto Precharge starts
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
=4('<6C=
CLK CMD RD Q0 Q1 Q0 Q2 Q1 Q3 Q2
*Note3
DQ ( C L2 ) DQ ( C L3 )
Q3
Auto Precharge starts
FB; 58,"'(("?4/ (''(.)56 !8,"'(("?4/ (''( B)+,0#("')%)'(((0,,2%, $(,&5.0,( C.,% "# A$,2( "# ('0$%, $(,&+(! (+")'(0,)0,$"%" A$2,(' 2," ('0$,( "#('+(! (+")'0,$"%" +),,(' 2,"2"$()%, $(,&. ",,)%0$(+(!""&(
. +#/ %2
=8,"",,)%'+?, $(,&<6C=
CLK CMD WR PRE
=8,"6),%< )?(&:=
CLK CMD WR STOP
DQ M DQ D0 D1 D2 D3
*Note 1
DQ
D0
D1
D2
tRDL
tBDL
=4('",,)%'+?, $(,&<6C=
CLK CMD RD PRE Q0 Q1 Q0 1
*Note3
=4('6),%< )?(&:=
CLK CMD DQ (C L2 ) RD STOP Q0 Q1 Q0 1
*Note 3
DQ (C L2 ) DQ ( C L3)
Q1
2
DQ(CL3)
Q1
2
O $!#/#$!#
='4&",
CLK
*Note 4
=% "('4&",
CLK
CMD
PRE
MR S
ACT
CMD
SMR S AC T SMR SSMR S ACT
1CLK 1CLK 1CLK 1CLK
tRP
1CLK
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
FB5 5M('(("42?, $(,& 5M('(("6),%*( B)+,0#("')%)'(((0,42?, $(,&,+),%5.0,( C.,% "# ?4/56$+(!%, $(,&."0 (, 4 (+")'((+(!%, $(,&(
,6 #
/
= !)%'CLK CKE Internal CLK CMD
=?2,*2CLK CKE Internal CLK
tS S
*Note 1
tSS
*Note 2
RD
CMD
NOP
ACT
,, "!0/#0!0
=)40,$
CLK
*Note 4 *Note 5
1 *+,
CMD
PRE
AR
CMD
CKE
tRP
tRC
=040,$ FB
CLK
*Note 4
CMD
PRE
SR
CMD
CKE
tRP
tRC
FB; "#%2,'25,,+(!( "#( ?, $(,&%2,'25+$+(!%, $(,&( A$(),0,$"$((64,0,$0 #"(*4 B%, $(,& ('(,,J)",'(0,)40,$ (' *),"&0,(),0,$ ('.($, (' (+( %' 60,- )"&() 0,0,$ ('.+$+(!)+"'(
<=4.6(! "#.) 040,$.?2,*2'/, *),"&0,0,$'.,0,$",#((',0,$%,("(,%,0,'",( 0,0,0,$,.0,0,$'"!%2$"/"2
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
*),"&0,0,$'.("%)-% /2"+'H (,'.(')%)2"+"";( *),"&0,0,0,$-" ('.($, (' (+( %' 60, 0,0,0,$'.+),(),0,$< =", ''
,( "+
6(" ' J)"()"& 9,(#)"& 4CLL$6I4A/I/B/A6/<6C.= 6C...('0)%(&2,(%(,)' 4CLL$6I4A/I/B/A6/<6C.= 6C.6C.9,(#)"&CJ)"()"&
?)' :*/
4CLL<",(#)"&'= (,"&'',6+"$)'+KL,KLN6C "06CLL59 ,)"& ?)' "06CLL5* ,)"& * )J)"( ,/-(%.<)'',- %6+"(,(.6C= )"& N2,".6CLL. ')",',
N,('.6CLL. ')",',
6C.((%%" ("(,%"+(+#-(%.(",(#)"& '. + 0""& (,"& ('', #(). ?)'* , )"& ' (+,("$6I4A/I/B/A6/ (,0) 4CLL<6C= N?)'6"(,)"& ')",',
E<6),% ('= BA$- )('',0
" /#, 4(' 8,"('2"$,(' )('', (,(" 4(') A$("""(,/-''*((:)?)' 6"(,)"&
4(' :*/
4(' )
C
, "+%
6(" :*/ )?(& 4..CLL ()%, $(,&.$)'+#"(' 4..CLL ()%, $(,&.$)'+#"(' 4..CLL 4..CLL 4..CLL 8,(%(,)''<90""+),&$=$)'+%%'++),% 4 ",,)%, ",,)%
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
% "( :*/ 648
4ECLL 4('6),C....0)%(& 2,"6),C ()%, $(,&02,".$)'+#"('
6 !8," 4(' :*/
$)'+#"('
)6 !8,"6(,"&,'6),&$C
()%, $(,&.$)'+#"(' 6),%
C.>("'*(0,+),%".0,C.,%
"# I"&+),% ('.,(''""%"+(0)%(&+), &$
9,,)% :*/
4 ",,)% <9,,)%'+ ?, $(,&=
60,$'0+),.42%, $(,& ('0$(+(!%,(' 2," +),2"$42%, $(,& C2"$*.#("'*(0,+),%".0,C.,% "# *),"&,(' 2,"+),2"$()%, $(,&. 4 ",,)% (+")' 60, $ ' 0 +),. 2 ,(' 2," % ,(' 2," +), (' (, 2 ,(' 2,"+),,+ !2," *),"&,(' 2,"+),2"$()%, $(,&. ",,)% (+")'
9,,)%
,- $8
=B,(8," 9 :(!"&56(!(8,"?,6"'.$ '+"%(!%$,"&"('((

"=A/? 94<4=5('(!OPCL.......L 9942 "#2"$* KL58,"?,6"'/(+ 999?,0,B,(8," "=9IA4A9:B 9 : *C *C B
=6 !8," ?"-(!"&56?"-*((")'$,)&$*%".$ '%"-!%$,"&"('(( ?9G/A:*??9B@A6/
! )+%% 8$"CK.L.4'CK.L.@,CK.L.Q2CK.L.6)CK.L "=A/? 9 4<4=5(' ,<0,+%%.$,)&$-* ,(,(''" ,,&",= ('< ,. ,. ,. ,=C<6).@,.Q2.4'= CL.......L 9942 "#2"$* KL59 :(!+8,"?,6"'*"(+ 9996 !2,"2"$*OPCK.......L FB5*+(!"&
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
")"*#
"=9IA4A9:B 9 :C 8$"*C 8$"*C 8$"*C 8$"*EC 8$"*C 8$"*C 6) 6) 6) 8$" 6) 6) 6) 8$" *C ,C@, 8$"*C 8$"*C 8$"*C 8$"*EC 8$"*C 8$"*C 8$"*C 8$"*C @, @, 8$" @, @, @, 8$" @,
*C ,CQ2 8$"*C 8$"*EC 8$"*C 8$"*C 8$"*C 8$"*C 8$"*C 8$"*
C Q2 8$" Q2 Q2 Q2 8$" Q2 Q2
*C ,C4' 8$"*C 8$"*C 8$"*C 8$"*C 8$"*C 8$"*
C 8$"*C 8$"*C 8$" 8$" 8$" 8$" 8$" 8$" 8$" 8$"
?"-('9 :(!"&56(!(8,"?,6"'.$ '+"%(!%$,"&"('(( 6?"-*((")'$,)&$*%".$ '%"-!%$,"&"('(( ?9G/A:*??9B@A6/ )+%%. 8$"CK.L.4'CK.L.@,CK.L.Q2CK.L.6)CK.L "= A/? 9 4<4=5(' ,<0,+%%.$,)&$-* ,(,(''" ,,&",= ('< ,. ,. ,. ,.=C<6).@,.Q2.4'= CL.......L 994<4=('(!(!OPCL.....L "65B9 :(!"&M659 :(!"&M659 :('?"-(!"&M65*6(!"& 99942 "#2"$* KL59 :(!+8,"?,6"'/(+ 9>6 !8,"2"$*OPCL......LElite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
"= 9IA4A9:B 9 : Q2 *C @, 4'
4' *C 8$" 8$"
9 : *C ,C6) Q2*C Q2*
C Q2*C Q2*C Q2*C Q2*EC Q2*C Q2*C 6) 6) 6) Q2 6) 6) 6) Q2
*C ,C@, Q2*C Q2*C Q2*C Q2*EC Q2*C Q2*C Q2*C Q2*C 6) 6) 6) 6) 6) 6) 6) 6)
*C ,CQ2 @,*C @,*EC @,*C @,*C @,*C @,*C @,*C @,*
C 4' @, 4' @, 4' @, 4' @,
*C ,C4' 8$"*C 8$"*C 8$"*C 8$"*C 8$"*C 8$"*
C 8$"*C 8$"*C 8$" 8$" 8$" 8$" 8$" 8$" 8$" 8$" B
?9G/
9 :
?9G/79 :
6QA/
FB5*+(!"& ,(2,".:B/ )" '(& )' ,''+<= + !2,"."('0"&,'('',. * ,( $%"-
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
#0!
! ! 1! ! 4 0! G G G G G G G G G G G G G G G G G G G G G G G G G G G G G 2 001

9*/
42 "#
4('
8,"
G G G G G G 6 6 4 6 4 G ? 6 G G G 6 G :?' :?' G G G G G G 6 .? G G 6 .? 6 .? 6 4 6 4 G G G G G G :?' G G G G G G G G 6 .? G G 6 .? 6 .? 6 4 6 ? G G G G G G G G G G G G 6 .? G G 6 .? 6 .?
B:? B:? 9/@ 9/@ 42 "#M( $42'',MB9:(! 42 "#M( $42'',M9:(! )40,$,040,$ B:? )40,$,040,$ 9/@ '4&", % "('4&", B:? B:? 9/@ 6&"4('M( $M*,"? 9/@ 6&"8,"M( $M*,"? 6&"8,"M( $M*,"? 9/@ ?, $(,& 9/@ 9/@ 9/@ % "('4&", B:?<")6),/'"42 "#= B:?<")6),/'"42 "#= A,+),"42( "# 9/@ A,+),.6&"4('M( $M*,"? 9/@ # ! $
%& % !
# ! $
%& % !
9/@ A,6),.?, $(,&""&0,4(' 9/@ 9/@ B:?<")6),/'"42 "#= B:?<")6),/'"42 "#= A,+),"42 "# 9/@ A,+),.6&"4('M( $M*,"? 9/@ # ! $
%& % !
# ! $
%& % !





Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
#01() )*!
! 8," ! 1! ! 4 0! 2 6 6 G G G G G 6 6 6 G G G G 6 6 6 G G G G 6 6 6 G G G G 6 6 6 G G G G 6 6 6 G G G G G G 001 4 4 G G G G G .? .? 4.? G G G G .? .? 4.? G G G G .? 4 ? G G G G .? 4 ? G G G G .? 4 ? G G G G G G

G G G G G G G G 4('2"$ G ) G ?, $(,& G G G G G G G G G G 8,"2"$ G ) G ?, $(,& G G G G G G G G G G G ?, $(,&"& G G G G G G G G G G G 6 ! G 8," G G 4 #,"& G G G G G G G G G 42 G "#("& G G G G G G G G G G G G 40,$"& G G G G G G 664/>9A9:B5 4C42'',<3= B:?CB:%,("('
9/@ A,6),5?, $(,&""&0,8," 9/@ 9/@ B:?<")6),/'"?, $(,&= B:?<")6),/'"?, $(,&= 9/@ 9/@ 9/@ 9/@ 9/@ B:?<")6),/'"?, $(,&= B:?<")6),/'"?, $(,&= 9/@ 9/@ 9/@ 9/@ 9/@ B:?"9'(0, B:?"9'(0, 9/@ 9/@ 9/@ B:?"9'(0, 9/@ B:?"42 "#(0, B:?"42 "#(0, 9/@ 9/@ 9/@ # !"
'
!
( "
9/@ B:?"42 "#(0, B:?"42 "#(0, 9/@ 9/@ 9/@ 9/@ 9/@ B:?"9'(0, B:?"9'(0, 9/@ 9/@ 9/@





6C6(!'',<6= C)'',<3=
?C?, $(,&<= ?C)?, $(,&<=
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
#01() )*!
FB5 ,"()$/2(( "#<"&$='),"&$%, '"& ! ('$ ),, ! 9&(+(!"% "0"'(M ) "(+&("$+(!"'" ('+6.'%'"&$(0$( +(! )("0+) ".+)),(,)'.(' ,2,", #,,J)", B:?+(!%, $(,&"&,""'((%, $(,&+(!"'" ('+6<('?=
9&("0(+(!""' &("0(+(!(,""',,2( "#(
#2(.!
8 8 ! 1! ! 4 0! 001 <',= G G G G G G G 9B>9* G G G G G /-"040,$"69(0, 0 G G /-"040,$"69(0, 40,$ G G 9/@ G G G 9/@ G G G G 9/@ G G G G G G B:?<("("040,$= G G G G G G G 9B>9* 6$ G G G G G /-"?2,*2"69 6(! G G /-"?2,*2"69 ?, $(,& G G 9/@ ?2, G G G 9/@ *2 G G G G 9/@ G G G G G G B:?<("("2?2,'= G G G G G G 40,A(+ G G G G G /,?2,*2 G G /,?2,*2 G G 9/@ 6(! G G G 9/@ 9' G G G 9/@ G G /,040,$ G G 9/@ G G G G G G B:? ( G G G G G G 40,:%,(""A(+ $,$( G G G G G G 6&" !)%'- "' G G G G G G /-" !)%'- +# G G G G G G ("(" !)%' 664/>9A9:B;69C6(!9' !

E E
E

FB5 0,/H2$"&$,(""-"0,0,$''("0
$(+(%(0,/H2 $"&$,(""")(2 (' /2$"&$,("""( $,)("0,(,",( ! ""))%"K1 !K)+("0+0,( ('$,$(-" E?2,'2('0,0,$ (+,'0,$(+(!"'( )+(&( ('
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
(3)4)5(2
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16
17
18
19
CKE
Hi gh l evel i s n ec es s ar y
CS
tRP
RAS
tRC
CAS
ADDR
KE Y
Ra
BA
KE Y
BS
A8 /A P
KE Y
Ra
WE
DSF
DQM
Hi gh l evel i s n ec es s ar y
High-z DQ
Pr ech arge (All Ban ks)
Auto Ref res h
Auto Ref res h
Mode R egis ter Set Row Active (W r i te P er B i t E nable or D is abl e)
:Don' t Care
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
),-
*6 6
*/-
+
,!7
)/891), 80
16 17 18 19
tCL tCC
CKE HIGH
tRAS tRC
*Not e1
tSH tSS tRP
CS
tRCD tSH
RAS
tSS tSH
CAS
tCCD
tSS tSH
ADDR Ra Ca
tSS
Cb Cc Rb
tSS
*Note 2 *Note 2, 3
tSH
*Note 2, 3 *Note 2, 3 *Not e4 *Note 2
BA
BS
BS
BS
BS
BS
BS
*Note3
*Note3
*Note 3 *Not e4
A8/AP
Ra
Rb
tSH
WE
tSS
*Note5 *Note 6 *Note 5
DSF
tSS
DQM
tSH tSS tSH
tRAC tSAC
DQ Qa Db
tSH
Qc
tSLZ
tOH tSHZ
tSS
Row Active Rea d ( W r i te per B i t Enable or Disable)
W rite or Block W rite
Read Precharge Row Act ive (W r ite Per Bit E nable or D is abl e )
:Don't Care
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
G@H, "
< # %7%%%
% ( +3/
+"
6 "#74(' 8," 6(! 6(!6

%0
"."

? 6 :%,(" *"(+()%, $(,&.(#+(!( "#('0+), *"(+()%, $(,&.(#+(!6( "#('0+), /(+()%, $(,&.%, $(,&+(!('0+), /(+()%, $(,&.%, $(,&+(!6('0+),
- "."
+"%%

? 6 G ?, $(,& 6(! 6(!6 6$6(!
:
4&+0
#8!"3

6 * :%,(" 6(!,2( "#.'"(+2,"%,+"0) "0,+(! 6(!,2( "#.(+2,"%,+"0) "0,+(! 6(!6,2( "#.'"(+2,"%,+"0) "0,+(!6 6(!6,2( "#.(+2,"%,+"0) "0,+(!6
K +
#8
* :%,(" B,(2," 6 !2," "") "

Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
*5 /-
+
):7), 8;
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16
17
18
19
HIGH CKE
*Note1
tRC
CS
tRCD
RAS
*Note 2
CAS
ADDR
Ra
Ca0
Rb
Cb0
BA
A8 /A P
Ra
Rb
WE
DSF
DQ M
tOH
DQ CL=2 Q a0 Q a1 Q a2 Q a3 Db0 Db1 Db2 Db3
tRAC
*Note3
tSAC tO H
Q a0 Qa1 Q a2
tSHZ
Q a3
*Not e 4
tRDL
CL = 3
Db0
Db1
Db2
Db3
tRAC
*Not e 3
tSAC
t S H Z *Note4
tRDL
Row Active ( A- Ban k )
Read (A-Bank)
Precharge ( A- Ban k )
Row Active ( A- B an k )
W rite (A- Ban k )
Precharge ( A- B an k )
:Don't Car e
1 *+,2
(&%3%4*56768,+%,94,:34,;+*6*%<8,+,&+,4&'8*<,4'+*&( (*5<4,6='4>,6'&&+,443<+?349+*&'&76768,(@,&>+=ABC'8;*3+<3+;'+''C'8'?8,'D+,4*5(,&+,49 <4,6='4>,('9+C'8;*3+<3+588?, A$'D+,4D4*%+=,68*6E( (66,99+%,D4*%*5';;4,99(1F8'+,&67A!F .(3+<3+588?,A$'D+,4+=,,&;*D?349+( .GH! +388<'>,?+?349+ ?349+954'Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
,
*5 /-
+
):7), 8;
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16
17
18
19
HIGH CKE
CS
tRC D
RAS
*Note 2
CAS
ADDR
Ra
C a0
Cb0
Cc0
C d0
BA
A8 /A P
Ra
tCDL
WE
*Note2
tRD L
DSF
*Note 1
*Note3
DQM
DQ
CL=2
Qa0
Qa1
Qb0
Qb1
Dc 0
Dc1
Dd0
D d1
CL = 3
Qa0
Qa1
Qb0
Dc0
Dc 1
Dd0
D d1
Row Active ( A- B an k )
R ea d (A-Bank)
R ea d (A-Bank)
W rite (A- Ban k )
W rite (A- Ban k )
Precharge ( A- Ban k )
:Don't Care
F B 5 A 2," '(( +0, +), ,(' '. * $)' + (,' $, %,", 2," (' (#"' +) " 42%, $(,&2"",,)%2,""&('(("%). +0,42%, $(,&.2"+2," * $)' (! "#("' "%) '(( %, $(,& (' 2$ (,"& %, $(,& +0, ' 0 +), 9%)'(((0,42%, $(,& 2"+(!'",(
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
-(: /-3 (
,!
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14
15
16
17
18
19
HIGH CKE
CS
RAS
CAS
*Note4
ADDR
RAa
CAa
CAb
RBa
CBa
CBb
BA
A8 /AP
RAa
RBa
WE
DSF
*Note2
tBWC
DQM
*Note3 *Note1
DQ
Pixel Mask
Pixel Mask
P ixe l Mask
Pixel Mask
Row Ac t i ve w i t h W rite-per- Bit Enable ( A- Ba nk )
Mas ked Block W rite ( A- Ban k ) Masked Block W rite with Auto Pr echarge (A-Bank)
Row Active ( B- B an k )
Bl ock W r i t e w i t h Auto Pr echar ge ( B- Bank) Bl oc k W r i t e ( B- Ban k )
:Don't Car e
FB5)(!<*"C5(!.*"C5B(!= 56 !8," " 6 !8,". ' $)'+"B:? :$,6(! (+( "#,%, $(,& 6 !8,"(,"&,'
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
)*-(:<(+
- 7), 8;
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16
17
18
19
HIGH CKE
CS
RAS
CAS
*Not e1
A0- 2
RAa
RBa
CBa
A3 ,4 ,7 , 8
RAa
CAa
RBa
CBa
A5
RAa
CAa
RBa
CBa
A6
RAa
CAa
RBa
CBa
A8/AP
RAa
RBa
BA
WE
DSF
DQM
DQ
Col or
I/O Mask
P ixe l Mask
I/O Mask
Col or
DBa0 DBa1 DBa2 DBa3
Load Color Register
Load M as k Register
Row Active with W PB* Enable ( A -B an k )
Row Ac tive Load Color with W PB* Regist er En able Masked Masked W rite (B-Ban k) Bloc k W r ite with Aut o (A - B an k ) Pr ech arge Load M as k Regi st er (B-Bank)
W P B * : W r i t e- P er- B i t :D on' t Care
FB5$- !0% "(',&", ('.2 ('"%"+
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
,
*/-
22)
):7), 8;
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16
17
18
19
HIGH CKE
*Note1
CS
RAS
*No te2
CAS
ADDR
RAa
CAa
RBb
CBb
CAc
CBd
CAe
BA
A8/AP
RAa
RBb
WE
DSF
LOW
DQM
DQ
CL=2
Q Aa 0 QAa1 QAa 2 QAa3 QBb0 QBb1 QBb 2 QBb 3 Q A c 0 QA c 1 QBd 0 QBd1 Q Ae 0 Q Ae 1
CL = 3
QAa 0 QAa1 Q Aa 2 Q Aa 3 QBb0 QBb 1 Q Bb 2 QBb 3 Q A c 0 QA c 1 QBd 0 QBd1 Q Ae 0 QAe 1
Row Active ( A- Ban k)
Row Active ( B- Ban k) Read (A- Bank )
Read (B- Bank )
Read (A- Bank )
R ead (B- Ban k)
Read (A- Ban k )
Precharge ( A- Ban k)
:Don't Care
FB5 (+'H (,2$ 4 . (' 8/ (,$"&$($ !$"&$&"&'& A",,)%(+),,('+,2%, $(,&.+$$,('('$%, $(,&+(!)+$(
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
, /-
22)
):7), 8;
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14
15
16
17
18
19
HIGH CKE
CS
RAS
CAS
ADDR
RAa
Key
CAa
RBb
CBb
CAc
CBd
BA
A8 /AP
RAa
RBb
tCDL
WE
DSF
DQM
DQ
M ask
D Aa0 DAa1 D Aa2 D Aa3 DBb0 D Bb1 DBb2 DBb3 DAc 0 DAc 1 DAc 2 D Ac 3 DBd0 DBd1 DBd2 DBd3
Load Mas k Register Row Active with W rite-Per-Bit enable (A-Bank)
Row Active ( B- Ban k) Masked W rite ( A- Bank )
W rite (B-Ban k)
Masked W rite with aut o pr ec h ar g e ( A- Ban k )
W rite with auto P rech arge (B-Bank)
:Don't Car e
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
*5 /-
22)
):7), 8;
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16
17
18
19
HIGH CKE
CS
RAS
CAS
ADDR
RAa
CAa
RBb
CBb
RAc
CAc
BA
A8 /A P
RAa
RBb
RAc
tCDL
WE
*Note 1
DSF
DQM
DQ CL= 2
Q Aa0 QAa1 QAa2 QAa3
DBb0 DBb1 DBb2 DBb3
QAc0 QAc1 QAc2
CL= 3
QAa0 QAa1 QAa 2 QAa3
DBb0 DBb1 DBb2 DBb3
QAc0 QAc1
Row Act ive (A-B an k )
Read (A- Bank )
Precharge ( A- B an k ) Row Active ( B- Ban k )
W rite (B-Ban k) Row Act ive (A -Ban k )
Read (A - Ban k )
:Don' t Car e
FB5 $)'+ %2,"
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
*5
0 CLOCK
/-3 (
,7), 8;
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
HIGH CKE
CS
RAS
CAS
ADDR
Ra
Rb
Ca
Cb
BA
A8 /A P
Ra
Rb
WE
DSF
DQM
DQ CL= 2
Q a0
Q a1
Q a2
Q a3
Db0
Db1
Db2
Db3
CL=3
Q a0
Q a1
Q a2
Q a3
Db0
Db1
Db2
Db3
Row Active ( A-Ban k )
Read wit h A u t o P r ec h ar g e ( A- Bank ) Row Ac t i ve (B -Ban k)
Au ot Pr ec h ar g e St ar t Poi n t ( A- Bank )
W ri te with Auto Pr echarge ( B- Bank)
A u ot P r ec h ar g e Star t Poin t ( B- Bank )
:Don't Care
FB5 $)'+ ,'"") +0,",(%, $(,&(, <9$ (06),&$C7.648'('6 !2,"=
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
*5
0 CLOCK
/-3 (
,7), 8;
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
HIGH CKE
CS
RAS
CAS
ADDR
Ra
Rb
Ca
Cb
Ra
Ca
BA
A8 /A P
Ra
Rb
Ra
WE
DSF
DQM
DQ CL=2
Qa0
Qa1
Q b0
Q b1
Db2
Db3
Da0
Da1
DQ C L= 3
Qa0
Qa1
Q b0
Qb1
Db2
Db3
Da0
Da1
Row Active (A -B an k )
Read w it h Auto Precharge ( A- Bank) Row Act ive (B-B an k ) Read wit hout Aut o Pr eaharge( B- Bank ) AutoPreaharge Star t Poin t (A- Bank)
Precharge ( B- B an k )
Row Ac tive (A-Bank )
W rite with Auto Preahar ge (A- Bank )
:Don't Care
FB58$4('<8,"= ('2"$()%, $(,&"")'(6(!(0,('66(!( "#(" 904('<8,"= ('2"$)()%, $(,&"")'(66(!+0,6(!()%, $(,&(,.6(! ()%, $(,&2"(,($- 066(!,(' ('"%)%" ( (' (+")'(6(!'),"&!(0,6(!()%, $(,&(,
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
*5
0 CLOCK
/-3 (
,7), 8;
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
HIGH CKE
CS
RAS
CAS
ADDR
Ra
Ca
Rb
Cb
BA
A8 /A P
Ra
Rb
WE
DSF
tRC D
DQM
DQ C L= 2
Q a0
Q a1
Q a2
Q a3
Db0
Db1
Db2
Db3
CL= 3
Q a0
Q a1
Q a2
Q a3
Db0
Db1
Db2
Db3
*Not e 1
Row Active ( A - B an k )
Read wit h Auto Pr echarge ( A- Bank)
Read w it h A u ot P r ec h ar g e Au t o Pr ech ar g e St ar t Poi n t ( B- Bank ) ( A- Bank) Row Active ( B- Bank)
Au ot Pr ec h ar g e St ar t Poi n t ( B- Bank)
:Don't Care
FB5 ('6(!"(2'"$"%,"' !"',"'0,(()%, $(,&(,%"
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14


15 16 17 18 19
HIGH CKE
CS
RAS
CAS
ADDR
RAa
CAa
CAb
BA
*Not e 1 *Not e 1
A8 /A P
RAa
WE
DSF
DQM
DQ CL= 2
*N ot e 2 1 Q Aa 0 Q A a 1 Q A a 2 Q A a 3 Q A a 4
1 DAb0 DAb1 DAb2 DAb3 DAb4 DAb5
CL=3
2 QAa0 QAa1 QAa2 QAa3 QAa4
2 DAb0 DAb1 DAb2 DAb3 DAb4 DAb5
Row Active ( A-Ban k )
Read ( A- Ba n k )
Burst Stop
Read ( A- Ba n k )
Pr echar ge ( A- Ban k )
:Don't Care
FB50)%(&'.+),"2(,%(,)'($'0+),()%, $(,&""%"+ +)$#("'*H(0,+),%.""(($ (0 4 ",,)% 6$ ((,"),('(+#""&'"(&,($(+.$ 6)(+),2,".6),%(' 4 ",,)%$)'+ %(,' (,0) 40,$""&'"(&,(0K )%(&2,"+),% L 6),%"#("'(0)%(&'
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14



15 16 17 18 19
HIGH CKE
CS
RAS
CAS
ADDR
RAa
CAa
CAb
BA
*Note1 *Note1
A8 /AP
RAa
tBDL
WE
tRD L
DSF
*Note3
DQM
*Note2
DQ
DAa0 DAa1 DAa2 DAa3 DAa4
DAb0 DAb1 DAb2 DAb3 DAb4 DAb5
Row Active ( A- B an k )
W rite (A-Ban k)
Burst Stop
W rite (A-Bank)
Precharge ( A- Ban k )
:Don't Care
FB5 0)%(&'.+),"2(,%(,)'($'0+),()%, $(,&""%"+ *(("($ 0+),% (' (+2,""$ ,,%'"&, 9"'0"'+%(,(,0 Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
* ),-= /-7), 8.1
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14
15
16
17
18
19
*Not e 1
HIGH
CKE
CS
RAS
*Not e 2
CAS
ADDR
RAa
CAa
RB b
CAb
RAb
CBc
CAd
BA
A8 /A P
RAa
RB b
RAc
WE
DSF
DQM
DQ C L= 2
QAa0
DAb0 DAb1
DBc 0
DAd0 DAd1
CL= 3
QAa0
DAb0 DAb1
DBc 0
DAd0 DAd1
Row Active ( A - B an k )
Row Ac ti ve ( B- Ban k) W rite (A- Ban k )
Row Active ( A- B an k )
Rea d (A - Ban k )
Precharge ( A- B an k )
R ea d w i t h Au t o Pr ec h ar g e ( A- Bank )
W r i t e wi t h Auto Pr echarge ( B- Bank) :Don't Care
FB5 648'"(+'+"&EK"&$L(4<'4&",= $648'.$+),&$(2,""0"-'KL,&(,'0%,&,('+),&$ 8$6482," ('2"$()%, $(,&"- )'.!%"""'$( $)'+#"(' )%, $(,&"- )'($+),' ."$ (06482," (' A$- "((,$%, $(,& 8?60) ""(%"+(648'
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
0 CLOCK 1 2 3 4 5 6 7 8 9 10 11 12 13 14
-(:) ()5$(
()/-7
)/8.1), 8;
15 16 17 18 19
CKE
CS
RAS
CAS
ADDR
Ra
Ca
Cb
Cc
BA
A8 /A P
RA
WE
DSF
*Note1
DQM
DQ
Q a0
Qa1
Q a2
Q a3
Q b0
Q b1
Dc0
Dc2
tSHZ
Row Active Read Clock Suspension Read
tSHZ
W rite DQM
Read DQ M
W rite
Clock Su s pen s i on
:Don't Care
FB5*''%,#+) "
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
0 CLOCK
*Not e 2
&<
,(3(3)(*7
)/8.1), 8;
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
tSS
CKE
*Not e 1
tSS
tSS
tSS
*Not e 3
CS
RAS
CAS
ADDR
Ra
Ca
BA
A8 /AP
Ra
WE
DSF
DQM
DQ
Q a0
Q a1
Q a2
Pr ech ar ge Pow er - dow n Entry
Pr ech ar ge Po w er - do w n E xi t Row Active Active Pow er - dow n Entr y
Read
Precharge
A ct ive Pow er - dow n E xi t :Don't Care
FB5+(!$)'+""'(%,",,"&%, $(,&%2,'2' /$)'+$"&$((K1L%,",42( "# (' (#"(""),0,$% "0" ("<=
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
-22 )/5> /-
0 CLOCK
*N ot e 2 *N ot e 4 *Not e 3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
tRCmi n tSS
*N ot e 6
CKE
*N ot e 1
tSS
CS
*Not e 5
RAS
*N ot e 7 *N ot e 7
CAS
ADDR
BA
A8 /A P
WE
DSF
DQM
DQ
Hi-Z
Hi-Z
Sel f R ef r esh En tr y
S e l f R e f r e s h E xi t
Auto Ref r es h
:Don't Care
FB5A:/BA/4/ 4/ 4/:*/ . 4 7 2"$/$)'+2($( ! 0, ! .($"%)" )'"&$ ! (+'H (,- %0,/ A$'#" ,(""0,0,$'(&(/(K2L 0=: $'#" ,0,0,$'"") ",J)",'+0,-"0,0,0,$ A:/G9A/ 4/ 4/:*/ !,(,('+(++0,,),"&/$"&$
(,0,$"&$ "")",J)",'(0,/&"&$"&$ %0,0,$-" 0+),(),0,$",J)",'+0,0,0,$,('(0,0,0,$-" "0$)+),,0,$
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT
(*, /-
0 CLOCK 1 2 3 4 5 6
(2 /-
0 1 2 3 4 5 6 7 8 9 10
HIGH CKE
HIGH
CS
*N ot e 2
tRC
RAS
*Note 1
CAS
*N ot e 3
ADDR
Key
Ra
WE
DSF
DQM
DQ
Hi-Z
Hi-Z
MRS New Com man d
Auto Ref res h
New C om m an d
:Don't Care
F6$+(!%, $(,&$)'+ %''4&", ('(),0,$ :*/4/@9A/4/AQ/ FB5 . 4 . 7 8/ ( "#("('* 02($( ! 2"$('',!2"",(' ,&", "") ! $)'++0,2 4 ( "#(" ?(,0,'4&",(+
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5
ESMT


++



++




!
" , / " 0 0, , ,
> 0 % .--/(- /)(- /7*-//- -+-,,- -//--- //-- /.-,77-- /---- /-,-,*--- ,*/-- ,*.-,7-- ,.--- ,.,--)(- -+-- -7(,)--1 -)(-1 - --+-
> 0 6 !
" 0 % % -,. ,/--,- , --( -,-. -,,* / -7( ,----+* --,( " -// -/ -+ ---. ---7 --7 -/-7-) -7, -7/, 0 //7( //- /.( -*+ -*+* -*7, 0, ,77- /--- /-,-))7 -)** -)+( ,)7( ,*/- ,*.( -(.* -((, -((( , ,7- ,.-- ,.,--/) --, --* -)( -+-7( --)1 , ,)-1 --/)1 -)(2! - - ( ---
--+
0 6 % --.* ---/ --* --7 ---7 --, --,( --( ---+ -7-. -7, -7/ -*+ -*+* -*7, -))* -)** -)+* -(.* -((, -((( --/) --, --* --)1 --/)2! - ( ---
Elite Semiconductor Memory Technology Inc.
P.
Publication Date : Oct. 2001 Revision : 1.5


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